The joint venture company said that Vedanta Foxconn JV has resubmitted an application to establish an electronic chip manufacturing plant.

The plant will be built with an estimated cost of Rs. 1.5 lakh crore and start generating income by 2027, the company has previously declared.

The application has been re-filed by the business under the amended semiconductor program.

The government has enhanced the fiscal incentive for establishing semiconductor Fabs in India of any node (including mature nodes) to 50 percent of the project cost under the updated scheme.

The Modified Semicon India Program for the development of India's semiconductor and display manufacturing ecosystem will be implemented, and applications will be received by India Semiconductor Mission, the designated nodal organization charged with this duty.

For the setting up of Semiconductor Fabs in India of any node (including mature nodes), firms, consortiums, and joint ventures are eligible for a Fiscal Incentive of 50 percent of the project cost under the Modified Program. Similar fiscal incentives of 50 percent of the project cost are offered for the establishment of Display Fabs using particular technology in India.

Up until December 2024, applications may be submitted under the ‘Modified Scheme for Establishing Compound Semiconductors, Silicon Photonics, Sensors, Discrete Semiconductors, and Semiconductor ATMP/OSAT Facilities in India’. Until December 2024, the Design Linked Incentive Scheme application window is also available. Under the DLI Scheme, 26 applications have so far been received, and five of them have obtained approval.

The establishment of Display Fabs of specific technologies in India is also eligible for a tax credit equal to 50 percent of the project cost.

When establishing compound semiconductors, silicon photonics, sensor fabs, and semiconductor assembly test marking and packaging (ATMP) facilities in India, authorized units might receive financial help equal to 30 percent of their capital expenditures under an earlier version of the scheme.

CEO David Reed previously stated that the company would produce wafers with a 28-nanometer and 40-nanometer pore size.

In the first half of 2027, production will begin with 5,000 wafers and increase to 40,000 wafers per month afterwards.