The Ministry of Electronics and Information Technology (MeitY), together with the Drone Federation India (DFI), introduced the second edition of the National Innovation Challenge for Drone Application and Research (NIDAR 2.0), inviting students to develop autonomous drones and local flight controllers utilizing India's indigenous VEGA processor.

As per a release from MeitY, NIDAR 2.0 presents a prize pool exceeding Rs 65 lakh, in addition to startup incubation, cloud computing credits, software assistance, and corporate internships for student teams taking part.

Introducing the challenge, MeitY Secretary S Krishnan stated, "NIDAR 2.0 elevates our students from merely operating drones to creating the drone's intelligence. When the drone's intelligence operates on India's VEGA processor, we are not merely educating engineers. We are establishing the groundwork for an independent drone industry.

He mentioned that "VEGA is created under the Digital India RISC-V (DIR-V) initiative, a MeitY-led program aimed at decreasing the nation's reliance on international chip designs and their associated licensing expenses."

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The ministry states that the newest version redirects emphasis from traditional drone platforms to self-operating systems, local avionics, and essential drone elements.

In the Drone Innovation track, student teams will create autonomous swarm drones that can find survivors and transport medical supplies in disaster-affected regions without relying on external communication networks, as well as develop GPS-denied drones for indoor industrial inspections.

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The Component Innovation track mandates that teams create an indigenous flight controller and autopilot centered on the VEGA processor utilizing local electronic parts. MeitY announced that the leading 100 teams chosen following the technical assessment will each obtain two VEGA processor kits for development, testing, and integration.

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The ministry announced that the VEGA processor family was developed by the Centre for Development of Advanced Computing (C-DAC) under MeitY's Microprocessor Development Programme and utilizes the open-standard RISC-V architecture.